(My B.Tech students have published 11 International journal papers and three book chapters)
Trilok Chand Dhal and Anoop Singh, Study of SOI MOSFETs fo Improved Breakdown Voltage,
Vijaysai Patnaik and Ankit Gheedia, 3D Quantum Simulation of Nanowire FETs,
2008.(Published a paper in Simulation Standard - Journal for Process and Device Engineers)
Atul Garg and Deepak Bhardwaj, Study of Nanoscale FETs,
Asun Hakhu and Aditya Bhalla, Simulation of Silicon on Insulator - Tunneling Field Effect Transistor
Mayank Gaur and Himanshu Batwani
, Analytical Modeling and Simulation of MOSFETs for Nanoscale Applications
, 2007 (One International Journal paper and Two International Conference papers).
Govind Saraswat and Pradeep Agarwal
, Incorporating BSIM4 Model in PSpice and Developing a Compact Model for FDSOI MOSFETs,
2007. (Published one IEEE Trans. on Electron Devices paper).
Tarunvir Singh, Modeling and Simulation of the Threshold Voltage of Double Gate and Cylindrical Gate Strained Si/SiGe MOSFETs,
2007 (Publishd Two International Journal papers).
Vivek Venkatraman and Susheel Nawal, Modeling and Simulation of Strained Silicon MOSFETs for Nanoscale Applications,
2006.(Published Two papers in IEEE Trans. on Electron Devices and one in IEEE Transactions on Device and Materials Reliability).
Vivek Venkatraman and Sumeet Kumar Gupta, Studies on Fringe Field Effects in Nanoscale High-K Dielectric SOI MOSFETs
, 2006 (Minor Project). (Published Three papers in IEEE Trans. on Electron Devices and applied for a patent).
Susheel Nawal and Sachit Grover, A High Current Gain Horizontal Current Bipolar Transistor (HCBT) technology for the BiCMOS integration with FinFETs,
2006 (Minor Project). (Published One Internatial conference paper).
(My M.Tech students have published 6 International journal papers and several conference papers)
Tarun Kumar Agarwal (
2008JVL2170), Compact Modeling of Partially Depleted Silicon-on-Insulator Drain Extended MOSFET (DEMOS) including High-Voltage and Floating Body Effects,
V. Babu, Controlling Short-channel Effects in Nanoscale Multi-Gate TFTs,
Naveen Gopal, Effect of Dual Channel Doping on the Performance of Trench Gate Power MOSFET,
M. Siva, Nanoscale SOI MOSFETs with Ground Plane in Buried Oxide for Diminished Short-channel Effects
, 2007.(One IEEE Trans. on Electron Devices paper in June 2008 issue and One patent application under consideration).
Harsh Bahl, Design and Simulation of New Schottky-gate Bipolar Mode Field Effect Transistor (SBMFET) on Silicon and Silicon Carbide,
2006. (Published an IEEE Trans. on Electron Devices paper and applied for a patent).
Boyapati Subrahmanyam, A Recessed Source Concept in Vertical Surrounding Gate MOSFET-Simulation study,
2006.(Published One International Journal paper).
Amit Sharma, Current Gain Enhancement in SiC Bipolar Transistors,
2006. (One International Conference paper).
, Controlling Short Channel Effects in Nano-scale SOI MOSFETs,
2005(One International Conference paper)
Girraj Prasad Khandelwal
, A Novel Vertical Gate SOI MOSFET for Suppression of Floating Body Effects: Simulation Studies,
, Analytical Modeling and Simulation of Fully Depleted Dual-Material Surrounding Gate (DMSG) MOSFET
, 2005. (Published an IEEE Trans. on Electron Devices paper and International Conference paper).
Amit Kumar Ojha
, A comparative Study of Silicon and Silicon Carbide Bipolar Mode Field Effects Transistor (BMFET) using 2-D Numerical Simulations,
2005.(One International Conference paper)
Rajani Kumar Surisetti
, Testable Path Selection for Delay Fault Testing and Diagnosis,
Bikash Ghose, Fabrication and Characterisation of Si and SiC MOS Capacitors,
K. S. Harish, Clocking Strategies for High-performance VLSI Systems with Special Emphasis on Optical Clocking,
B. R. Kiran, Scan testing of multiple clock digital circuits,
P. Kumar, Switching activity in CMOS logic,
(co-guide Dr. B.Bowmik), 1998.
S. Koranne, A methodology to estimate cross-talk in VLSI circuits,
Y. M. Rao
, Design and simulation of silicon and silicon-carbide thyristors,
G.Venkataraman, Modeling and simulation of ESD circuits,
(co-guide - Dr. G.S.Visweswaran), 1997.
, Modeling and simulation of radiation effects in bipolar transistors
, Electrostatic microactuators using direct wafer bonding technology,
(co-guide- Dr. S. Chandra), 1997.
A. K. Sinha, Modeling and simulation of stand alone grounded gate nMOST secondary protection element under HBM ESD stress,
, Investigations on free-standing polysilicon beams for sensor applications,
(co-guide-Dr. H.D.Banerjee, IIT KGP), 1995.
Vinod Godghate, Studies on polysilicon polyemitter bipolar transistors,
K. Dutta, Modeling and simulation of bipolar transistors,
1995. (Published Two International Journal papers).