Go to Shouri Chatterjee's homepage  Shouri Chatterjee
 Department of Electrical Engineering

Publications

  • N. Nallam, S. Chatterjee, "Design of concurrent multi-band matching networks", IEEE International Symposium on Circuits and Systems, Digest of Technical Papers, Rio-de-Janeiro, May 2011.
  • H. Shrimali, S. Chatterjee, "11 GHz UGBW Op-amp with feed-forward compensation technique", IEEE International Symposium on Circuits and Systems, Digest of Technical Papers, Rio-de-Janeiro, May 2011.
  • H. Shrimali, S. Chatterjee, "Third order harmonic cancellation technique for a parametric amplifier", IEEE International Symposium on Circuits and Systems, Digest of Technical Papers, Rio-de-Janeiro, May 2011.
  • S. Chatterjee, P. Kinget, "A 0.5-V 1-Msps track-and-hold circuit with 60-dB SNDR", IEEE Journal of Solid State Circuits, Vol. 42, No. 4, pp. 722-729, Apr. 2007.
  • K.P. Pun, S. Chatterjee, P. Kinget, "A 0.5-V 74-dB SNDR 25-kHz continuous-time delta-sigma modulator with a return-to-open DAC", IEEE Journal of Solid State Circuits, Vol. 42, No. 3, pp. 496-507, Mar. 2007.
  • S. Chatterjee, Y. Tsividis, P. Kinget, "Ultra-Low Voltage Analog Integrated Circuits", IEICE Transactions on Electronics, Vol. E89-C, No. 6, pp. 673-680, Jun. 2006.
  • S. Chatterjee, P. Kinget, "A 0.5-V 1-MSample/s 60-dB SNDR Track-and-Hold Circuit", Symposium on VLSI Circuits, Digest of Technical Papers, pp. 56-57, Jun. 2006.
  • K.P. Pun, S. Chatterjee, P. Kinget, "A 0.5V 74dB SNDR 25kHz CT ΔΣ Modulator with Return-to-Open DAC", IEEE International Solid State Circuits Conference, Digest of Technical Papers, pp. 72-73, Feb. 2006.
  • P. Kinget, S. Chatterjee, Y. Tsividis, "0.5V analog integrated circuits", in Analog Circuit Design: RF Circuits: Wide band, Front-Ends, DACs, Design Methodology and Verification for RF and Mixed-Signal Systems, Low Power and Low Voltage, ed. M. Steyaert, J.H. Huijsing, and A.H. von Roermund, Springer, Berlin, 2006.
  • S. Chatterjee, Y. Tsividis, P. Kinget, "0.5-V analog circuit techniques and their application in OTA and filter design", IEEE Journal of Solid State Circuits, vol. 40, no. 12, pp. 2373-2387, Dec. 2005.
  • S. Chatterjee, T. Musah, Y. Tsividis, P. Kinget, "Weak inversion MOS varactors for 0.5 V analog integrated filters", Symposium on VLSI Circuits, Digest of Technical Papers, pp. 272-275, Jun. 2005.
  • S. Chatterjee, Y. Tsividis, P. Kinget, "A 0.5V Filter with PLL-Based Tuning in 0.18µm CMOS Technology", IEEE International Solid State Circuits Conference, Digest of Technical Papers, pp. 506-507, 613, Feb. 2005.
  • S. Chatterjee, Y. Tsividis, P. Kinget, "A 0.5V Bulk-Input Fully Differential Operational Transconductance Amplifier", Proc. European Solid State Circuits Conference, pp. 147-150, Sep. 2004.

Patents

  • J. Steensgaard, S. Chatterjee, P.A. Lagervall, "Serial Data Interface", U.S. Patent no. 6952174, filed on Sep. 9, 2002, granted on Oct. 4, 2005.

Books

  • S. Chatterjee, K.P. Pun, N. Stanic, Y. Tsividis, P. Kinget, "Analog Circuit Design Techniques at 0.5V", Springer, New York, USA, 2007.
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Last updated on July 14 2011 at 07:23 IST