Journal Publications

• G. Chowdary, T. Aashish, S. Chatterjee, "A 99% current efficient three-transistor regulator with built-in 80 ppm/°C reference for 0-10 mA loads", IEEE Solid State Circuits Letters, vol. 1, no. 2, pp 26-29, Feb. 2018.
• R. Kaushik, S. Chatterjee, G.S. Visweswaran, "Charge controlled oscillators and their application in frequency synthesis", IEEE Transactions on Circuits and Systems - II, vol. 64, no. 10, Oct. 2017, pp. 1127-1131.
• H. Shrimali, S. Chatterjee, "A technique to linearize the discrete-time parametric amplifier", Elsevier Microelectronics Journal, vol. 46, no. 11, Nov 2015, pp. 1033-1038.
• G. Chowdhary, S. Chatterjee, "A 300-nW sensitive, 50-nA DC-DC converter for energy harvesting applications", IEEE Transactions on Circuits and Systems - I, vol. 62, no. 11, Nov. 2015, pp. 2674-2684.
• K. Anlay, B. Bhaumik and S. Chatterjee, "Design and Implementation of Computationally Efficient Image Compressor for Wireless Capsule Endoscopy", Circuits, Systems and Signal Processing, pp 1-27, 2015.
• N. Nallam, S. Chatterjee, "Multi-band frequency transformations, matching networks and amplifiers", IEEE Transactions on Circuits and Systems I, Vol. 60, No. 6, pp. 1635-1647, Jun. 2013.
• H. Shrimali, S. Chatterjee, "Distortion analysis of a Three-Terminal MOS-Based Discrete-Time Parametric Amplifier", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 58, No. 12, pp. 902-905, Dec. 2011.
• S. Chatterjee, P. Kinget, "A 0.5-V 1-Msps track-and-hold circuit with 60-dB SNDR", IEEE Journal of Solid State Circuits, Vol. 42, No. 4, pp. 722-729, Apr. 2007.
• K.P. Pun, S. Chatterjee, P. Kinget, "A 0.5-V 74-dB SNDR 25-kHz continuous-time delta-sigma modulator with a return-to-open DAC", IEEE Journal of Solid State Circuits, Vol. 42, No. 3, pp. 496-507, Mar. 2007.
• S. Chatterjee, Y. Tsividis, P. Kinget, "Ultra-Low Voltage Analog Integrated Circuits", IEICE Transactions on Electronics, Vol. E89-C, No. 6, pp. 673-680, Jun. 2006.
• P. Kinget, S. Chatterjee, Y. Tsividis, "0.5V analog integrated circuits", in Analog Circuit Design: RF Circuits: Wide band, Front-Ends, DACs, Design Methodology and Verification for RF and Mixed-Signal Systems, Low Power and Low Voltage, ed. M. Steyaert, J.H. Huijsing, and A.H. von Roermund, Springer, Berlin, 2006.
• S. Chatterjee, Y. Tsividis, P. Kinget, "0.5-V analog circuit techniques and their application in OTA and filter design", IEEE Journal of Solid State Circuits, vol. 40, no. 12, pp. 2373-2387, Dec. 2005.

Conference Publications

• S. Kumar, S. Chatterjee, S. Koul, "77 GHz integrated patch antennae in 0.18 μm CMOS technology", in Asia Pacific Microwave Conference (APMC) 2016, Delhi, India, Dec. 2016.
• S. Chatterjee, A. Chopra, "A 24 mW, 80 dB SNR, 50 MHz multi-bit continuous time ΣΔ ADC in 28 nm FD-SOI", in IEEE International Symposium on Circuits and Systems (ISCAS) 2016, Montreal, May 2016.
• S. Chatterjee, M. Tarique, "A 100-nW sensitive RF-to-DC CMOS rectifier for energy harvesting applications", in 2016 International Conference on VLSI Design, Kolkata, India, 4-6 Jan 2016.
• B. Bhuvan, S. Chatterjee, M. Sarkar, "PTC Inspired Column Level Compression in Low Power CMOS Imagers", in 2015 International Image Sensors workshop, Vaals, The Netherlands, 2015.
• N. Nallam, S. Chatterjee, "On the use of Frequency Transformations in the Design of Broad-band and Concurrent Multi-band Power Amplifiers", in IEEE Radio Wireless Week (RWW) 2015, San Diego, USA, 25-28 Jan. 2015.
• K. Anlay, B. Bhaumik, S. Chatterjee, "A low-power color-mosaic image compressor based on optimal combination of 1-D discrete wavelet packet transform and DPCM for wireless capsule endoscopy", in BIODEVICES 2015, International Conference on Biomedical Electronics and Devices, Lisbon, Portugal, 12-15 Jan. 2015.
• S. Monga, S. Chatterjee, "A 25.5mW 10Gb/s inductorless receiver with an adaptive front-end in 0.13 μm CMOS", in 2014 IEEE International System-on-Chip Conference (SOCC), Las Vegas, NV, USA, 2-5 Sep. 2014, pp. 431-436.
• S. Monga, S. Chatterjee, "An inductorless continuous time equalizer with programmability for gigabit links", in 2014 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), College Station, TX, USA, 3-6 Aug. 2014, pp. 713-716.
• N. Nallam, S. Chatterjee, "A Multi-Frequency RF-to-DC Converter for Energy Harvesting and for Passive RFID", in International Conference for VLSI and Signal Processing, ICVSP 2014, Digest of Technical Papers, Kharagpur, 12-15 Jan. 2014.
• S. Monga, S. Chatterjee, "An adaptive inductor-less continuous-time equalizer for Gigabit Links in 0.13 μm CMOS", in 27th International Conference on VLSI Design, 2014, Digest of Technical Papers, pp. 450-454, Mumbai, 5-9 Jan. 2014.
• H.S. Bindra, S. Chatterjee, K. Saha, T. Kukkal, "Clock and data recovery module in 90nm for 10Gbps serial link with −18dB channel attenuation", 2013 IEEE International Symposium on Circuits and Systems, Digest of Technical Papers, Beijing, 19-23 May 2013, pp. 2472-2475.
• S. Kundu, S. Chatterjee, "A 44-GHz quadrature travelling wave oscillator", International Conference on VLSI Design, Digest of Technical Papers, Pune, Jan 2013.
• P. Dubey, S. Chatterjee, "Heterogeneous coupled ring oscillator arrays for reduced phase noise at lower power consumption", Asian Solid State Circuits Conference (A-SSCC), Digest of Technical Papers, Kobe, Japan, Nov 2012.
• S. Kumar, S. Chatterjee, "A 110-dB Dynamic Range, 76-dB Peak SNR Companding Continuous-Time ΔΣ Modulator for Audio Applications", International Conference on VLSI Design, Digest of Technical Papers, Hyderabad, Jan 2012.
• S. De, S. Chatterjee, "Network energy driven wireless sensor networks", Biologically inspired networking and sensing: algorithms and architectures, IGI Global, 2012.
• N. Nallam, S. Chatterjee, "Design of concurrent multi-band matching networks", IEEE International Symposium on Circuits and Systems, Digest of Technical Papers, Rio-de-Janeiro, May 2011.
• H. Shrimali, S. Chatterjee, "11 GHz UGBW Op-amp with feed-forward compensation technique", IEEE International Symposium on Circuits and Systems, Digest of Technical Papers, Rio-de-Janeiro, May 2011.
• H. Shrimali, S. Chatterjee, "Third order harmonic cancellation technique for a parametric amplifier", IEEE International Symposium on Circuits and Systems, Digest of Technical Papers, Rio-de-Janeiro, May 2011.
• S. De, A. Kawatara, S. Chatterjee, "On the Feasibility of Network RF energy operated field sensors", in IEEE International Conference on Communications (ICC) 2010, Cape Town, South Africa, 23-27 May 2010.
• S. Chatterjee, P. Kinget, "A 0.5-V 1-MSample/s 60-dB SNDR Track-and-Hold Circuit", Symposium on VLSI Circuits, Digest of Technical Papers, pp. 56-57, Jun. 2006.
• K.P. Pun, S. Chatterjee, P. Kinget, "A 0.5V 74dB SNDR 25kHz CT ΔΣ Modulator with Return-to-Open DAC", IEEE International Solid State Circuits Conference, Digest of Technical Papers, pp. 72-73, Feb. 2006.
• S. Chatterjee, T. Musah, Y. Tsividis, P. Kinget, "Weak inversion MOS varactors for 0.5 V analog integrated filters", Symposium on VLSI Circuits, Digest of Technical Papers, pp. 272-275, Jun. 2005.
• S. Chatterjee, Y. Tsividis, P. Kinget, "A 0.5V Filter with PLL-Based Tuning in 0.18µm CMOS Technology", IEEE International Solid State Circuits Conference, Digest of Technical Papers, pp. 506-507, 613, Feb. 2005.
• S. Chatterjee, Y. Tsividis, P. Kinget, "A 0.5V Bulk-Input Fully Differential Operational Transconductance Amplifier", Proc. European Solid State Circuits Conference, pp. 147-150, Sep. 2004.

Patents

• S. Chatterjee, P. Kinget, "Low voltage track and hold circuits", U.S. Patent no. 8441287, granted on May 14, 2014.
• K.P. Pun, S. Chatterjee, P. Kinget, "Low voltage comparator circuits", U.S. Patent no. 8704553, granted on Apr. 22, 2014.
• K.P. Pun, S. Chatterjee, P. Kinget, "Low voltage digital to analog converter, comparator and sigma-delta modulator circuits", U.S. Patent no. 8305247, granted on Nov. 6, 2012.
• S. Chatterjee, Y. Tsividis, P. Kinget, "Low Voltage Operational Transconductance Amplifier Circuits", U.S. Patent no. 8030999, filed on Sep. 20, 2005, granted on Oct. 4, 2011.
• J. Steensgaard, S. Chatterjee, P.A. Lagervall, "Serial Data Interface", U.S. Patent no. 6952174, filed on Sep. 9, 2002, granted on Oct. 4, 2005.

Books

• S. Chatterjee, K.P. Pun, N. Stanic, Y. Tsividis, P. Kinget, "Analog Circuit Design Techniques at 0.5V", Springer, New York, USA, 2007.